Cypress Semiconductor /psoc63 /USBFS0 /USBDEV /OSCLK_DR0

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Interpret as OSCLK_DR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDER

Description

Oscillator lock data register 0

Fields

ADDER

These bits return the lower 8 bits of the oscillator locking circuits adder output.

Links

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